Extra exam question E6C08
Subelement E6, CIRCUIT COMPONENTS· Group E6C
E6C08
In Figure E6-3, which is the schematic symbol for a NAND gate?
- A.1
- B.2 (correct answer)
- C.3
- D.4
WhySymbol 2 in Figure E6-3 is the schematic symbol for a NAND gate. In Figure E6-3, symbol 2 shows the flat-backed, rounded-front AND gate shape with a small bubble at its output, and that output bubble is what turns an AND gate symbol into a NAND (NOT-AND) gate, answer B. Symbol 1 is a plain AND gate without the bubble, symbol 3 is an OR gate, and symbol 4 is a NOR gate (OR shape with a bubble), none of which is the NAND gate being asked for.
Published 2026-08-28 · Last updated 2026-08-28 · Question text is verbatim from the 2024-2028 NCVEC Element 4 pool (public domain); the explanation above is original writing, see our methodology.
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